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Oct 15, 2007

Yield/Defect Reduction Engineer, Qimonda North America

Education Requirements or Equivalency: * BS degree in appropriate engineering discipline (Electrical/Physics/Physical Chemistry/Chemical) Minimum Experience/Skill Requirements: * Minimum 3 years in semiconductor engineering * Fluent in English

Job Responsibilities:

  • Act as the defect module leader for 200mm factory.
  • Co-Lead or Lead cross-functional teams to systematically reduce baseline defect levels.
  • Basic understanding of methodology of DDE inspection and review tools, incl. EDX
  • Prediction of yield and reliability impact of new defect types
  • Support UPE and PCI module owner in evaluation of PCRB experiments
  • Creation of Out-of-control action-plans (OCAP) for known defect issues
  • Implement benchmark defect reduction systems.
  • Implementation of adequate separation / filtering method for important defects ( large defect threshold, repeaters, binning, ADC, etc) together with Defect Density tool group
  • Work closely with Unit Process engineering teams to identify the root cause (tool correlation, partitioning design and organization) of defect issues.
  • Work closely with process engineering to implement early defect detection and tool monitoring.
  • Work closely with defect metrology teams to optimize defect inspection strategy and recipes.
  • Effectively communicate defect reduction progress to goals and improvement opportunities.
  • Coordinate line partitioning activities within a module for DRAM products.
  • Quickly identify and resolve the root cause of defect out of control events on volume DRAM products, and/or New Part Introductions and/or Technology Transfers
  • Establish correlation between defects and yield on DRAM products.
  • Disposition discrepant material through participation in Material Review Boards.
  • Suggest defect reduction and process improvement experiments.
  • Drive process implementation of baseline defect improvements through Process Change Review Board participation.
  • Perform wafer, trend, and pareto analysis on module defects using Defect Management Software.
  • Monitor line defect performance using SPC and develop/coordinate out of control action plans.
  • Training of sustainers and associates operators for defect reduction topics within module
  • Adding new detection / Control Capability


Company name: Qimonda North America · Location: Richmond, VA,