The only dedicated jobs site for semiconductor manufacturing professionals

The main responsibility of the Senior DRAM Design Analysis Engineer is to analyze DRAM devices to verify design targets & device functionality.
In accomplishing this task the engineer will utilize many of the following skills:
- Operate various bench tester platforms & probe stations

-Utilize bench lab equipment, e.g., oscopes, voltage meters, etc
- Define, verify, & build test fixtures
- Develop and utilize data analysis tools
- Test memory devices accurately and rapidly
-Perform pico-probing & high speed test
- Create & present engineering reports
- Conduct logic & SPICE simulations to verify test setup & device function
- Develop advanced understanding of semiconductors & CMOS circuits
- Make & track detailed testing/analysis plans-Create & present engineering reports
- Identify & highlight concerns
- Transfer knowledge/skills and train other team members
- Conduct internal training for junior engineers

Education and experience requirements:
The candidate must have an MS EE, MS CE, or MS Physics and at least two years of engineering experience. Or the candidate must have a BS EE, BS CE, or BS Physics and at least seven years of engineering experience.
The experience requirements must be fulfilled in semiconductor product engineering, semiconductor tests engineering or programming in C++, Pascal, Fortran or similar language.